HDLC Controller

Introductions

High Level data Link (HDLC) is serial communication like provide high speed connection solution on single wire for each communication side and clock, support point to point communication and point to multi point solution (multi drop), HDLC provides very low cost solution for inter connection communication applications

 

Spring Electronics HDLC controller support variety of application provides simple and low cost inter connect solution in high bandwidth, integrate system enhancements like status updates, mixing of other communication ports like Uarts, ETH, SPI, GPIOs over the HDLC.

Spring Electronics design generic HDLC controller enable easy access and use of the benefit the advantage HDLC protocol provides:

  • Internal Addressing
  • External Addressing
  • Control filed
  • Payload
  • CRC 8 / 16 or 32
  • Multi HDLC channel in single chip solution – Up to 32 independent HDLC controllers

FEATURES

  • DMA user interface, HDLC IP builds the HDLC frame.
  • Compatible with HDLC standard
  • Support Multi Master Operation and Slave
  • Management  programmable clock frequency
  • Interrupt masking and control options
  • Built in framing support for bridge applications (HDLC <-> Uart, HDLC <-> SPI, HDLC <-> ETH and more)
  • Supports non,8,16 and 32 bit CRC
  • Synchronous design
  • User data interface options : DMA, Local bus, ETH and more

HDLC Available IPs Options

TDM Over ETH IP is grate solution for Multi E1’s / T1’s transport over full standard ETH 100BT / GETH.

High level design overview

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